Special Topics in System Level Design: Networks on Chip

Goal

Networks on Chip is a new paradigm for system on chip design. It borrows ideas from Computer Networks
for providing interconnections and communication among on-chip cores. The goal of the course is to introduce
the issues involved in designing systems using this new paradigm. The course also addresses the issue of analysis
and mapping of time and power constrained applications on network on chip architectures.

Organization:

The course consists of two parts:

Literature:

Networks on Chip
edited by Axel Jantsch, Hannu Tenhunen
Kluwer Academic Publishers, Boston, 2003

Selected research papers (see below).

Examination:

Technical report and seminar presentation.
Groups of two (if needed, three) students will select a topic for preparation of a report and seminar presentation.
2 hours will be allocated for the presentation by each group. Final grading will be based on the reports and
presentations. All course participants are supposed to participate at all lectures and presentations.

Credits:

4 points.

Lectures:

Prof. Axel Jantsch, KTH
Prof. Shashi Kumar, Högskolan i Jönköping
Prof. Luca Benini, University of Bologna

Examiner:

Petru Eles, tel 28 13 96, e-mail petel@ida.liu.se.
Zebo Peng, tel 28 40 46, e-mail zebpe@ida.liu.se

Lecture Plan:

Proposed topics and literature for report/presentation:



12-Jan-05