MCC-2011
Fourth Swedish Workshop on Multicore Computing
November 23-25, 2011, Linköping University
PROGRAM
Wednesday 23/11/2011
Location: Visionen lecture hall
13:30-14:00 Registration (in front of the Visionen lecture hall)
14:00-15:30 Tutorial 1
Samuel Thibault (INRIA, France):
StarPU: Exploiting heterogeneous, accelerator-based multicore machines
For abstract and speaker's bio, see the tutorials page.
15:30-16:00 Coffee break
16:00-17:30 Tutorial 2
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George Russell (Codeplay Software Ltd., Edinburgh):
Offload C++ - Concepts and Application
For abstract and speaker's bio see the tutorials page.
Thursday 24/11/2011
Location: Visionen lecture hall
08:45-09:15 Registration (in front of the Visionen lecture hall)
09:15-09:30 Opening
09:30-10:30 Keynote presentation
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David Moloney (Movidius Ltd., Dublin, Ireland):
Green MulticoreFor abstract and speaker's bio, see the keynotes page.
10:30-11:00 Coffee break and poster exhibition
(in front of the Visionen lecture hall)
11:00-12:15 Session I: Memory Hierarchy (chair: Häkan Grahn)
- Alberto Ros, Blas Cuesta, María E. Gómez, Antonio Robles and José Duato.
Characterization of Cache Misses in Large-Scale Cache-Coherent Servers - Angelos Arelakis and Per Stenström.
Towards Value-Aware Caches - Andreas Sandberg, David Black-Schaffer and Erik Hagersten.
A Simple Statistical Cache Sharing Model for Multicores
12:15-13:20 Lunch (Buffet in Ljusgården)
13:20-14:20 Keynote presentation
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Victor Pankratius (Karlsruhe Institute of Technology, Germany):
Ubiquitous Auto-tuningFor abstract and speaker's bio, see the keynotes page.
14:20-15:10 Session II: Autotuning (chair: Bengt Jonsson)
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Usman Dastgeer and Christoph Kessler.
A performance-portable generic component for 2D convolution computations on GPU-based systems -
Marcus Holm, Martin Tillenius and David Black-Schaffer.
A Simple Model for Tuning Tasks
15:10-15:40 Coffee break and poster exhibition
(in front of the Visionen lecture hall)
15:40-16:30 Session III: Transactional memory and thread-level speculation (chair: Jörg Keller)
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Anurag Negi, Rubén Titos-Gil, Manuel Acacio, José Garcia and Per Stenstrom.
Improving Commit Scalability in Lazy Hardware Transactional Memory -
Jan Kasper Martinsen, Håkan Grahn and Anders Isberg.
The Effect of Thread-Level Speculation on a Set of Well-known Web Applications
16:30-17:30 Panel discussion (chair: Bertil Svensson)
Teaching Multicore Programming: When, What, How? Perspectives from Industry vs. Academia
Panelists: Håkan Grahn (slides), Per A. Holmberg (slides), Victor Pankratius, George Russell (slides), Philippas Tsigas
Friday 25/11/2011
Location: Visionen lecture hall
08:15-09:00 Keynote presentation
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Philippas Tsigas (Chalmers University of Technology):
Design Challenges for Scalable Concurrent Data StructuresFor abstract and speaker's bio, see the keynotes page.
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Akhtar Ali, Usman Dastgeer and Christoph Kessler.
OpenCL on shared memory multicore CPUs. -
Ghislain Roquier, Endri Benzati, Marco Mattavelli and Jörn W Janneck.
(presented by Johan Eker)
Portable and scalable parallelism for multi-core and reconfigurable hardware using dataflow programs
09:50-10:20 Coffee break and poster exhibition
10:20-12:00 Session V: Scheduling and Mapping (chair: Peter Fritzson)
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Georgios Varisteas, Mats Brorsson and Karl-Filip Faxén.
Dynamic Inter-core Scheduling in Barrelfish: avoiding contention with malleable process domains. -
Ananya Muddukrishna, Mats Brorsson and Vladimir Vlassov.
A Locality Approach to Architecture-aware Task-scheduling in OpenMP -
Essayas Gebrewahid, Zain Ul-Abdin and Bertil Svensson.
Mapping Occam-pi programs to a Manycore Architecture -
Kenan Avdic, Nicolas Melot, Christoph Kessler and Jörg Keller.
Pipelined parallel sorting on the Intel SCC
12:00-13:00 Lunch (in Ljusgården)
13:00-13:45 Keynote presentation
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David Black-Schaffer (Uppsala University):
GPUs: The Hype, The Reality, and The FutureFor abstract and speaker's bio, see the keynotes page.
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Erwin Laure and Marwa Abdul-Monem.
Improving Gaussian Elimination on Multi-Core Systems -
Afshin Hemmati Moghadam, Mahder Gebremedhin, Kristian Stavåker and Peter Fritzson.
Simulation and Benchmarking of Modelica Models on Multi-Core Architectures with Explicit Parallel Algorithmic Language Extensions -
Muhammad Zeeshan Iqbal, Håkan Grahn and Johanna Törnquist.
A Parallel DFS Algorithm for Train Re-scheduling During Traffic Disturbances - Early Results
15:00-15:05 Closing
Page responsible: Christoph Kessler
Last updated: 2012-07-13